When adding Binary, how do you just ignore the overflow?











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1
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So lets say I used 2's complement to put -17 in binary and then I added it to 27 e.g



enter image description here



This calculation here would have an overflow of 1?
Where did this overflow of 1 go?
How can you possibly just disregard it when it would completely change the whole calculation?



When you add 2's complement does it just always mean you have to work in a predefined number of bits and why?



Thank you for your contribution.



EDIT: in addittion to this in 2s complement would you have a -0 value or only one +0 value?









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  • Ignoring the overflow bit is what makes two's complement work. Computers always work in a predefined number of bits.
    – Felthry
    5 hours ago






  • 1




    Adding two 2’s complement numbers with different signs can never cause an overflow.
    – Spehro Pefhany
    2 hours ago















up vote
1
down vote

favorite












So lets say I used 2's complement to put -17 in binary and then I added it to 27 e.g



enter image description here



This calculation here would have an overflow of 1?
Where did this overflow of 1 go?
How can you possibly just disregard it when it would completely change the whole calculation?



When you add 2's complement does it just always mean you have to work in a predefined number of bits and why?



Thank you for your contribution.



EDIT: in addittion to this in 2s complement would you have a -0 value or only one +0 value?









share
























  • Ignoring the overflow bit is what makes two's complement work. Computers always work in a predefined number of bits.
    – Felthry
    5 hours ago






  • 1




    Adding two 2’s complement numbers with different signs can never cause an overflow.
    – Spehro Pefhany
    2 hours ago













up vote
1
down vote

favorite









up vote
1
down vote

favorite











So lets say I used 2's complement to put -17 in binary and then I added it to 27 e.g



enter image description here



This calculation here would have an overflow of 1?
Where did this overflow of 1 go?
How can you possibly just disregard it when it would completely change the whole calculation?



When you add 2's complement does it just always mean you have to work in a predefined number of bits and why?



Thank you for your contribution.



EDIT: in addittion to this in 2s complement would you have a -0 value or only one +0 value?









share















So lets say I used 2's complement to put -17 in binary and then I added it to 27 e.g



enter image description here



This calculation here would have an overflow of 1?
Where did this overflow of 1 go?
How can you possibly just disregard it when it would completely change the whole calculation?



When you add 2's complement does it just always mean you have to work in a predefined number of bits and why?



Thank you for your contribution.



EDIT: in addittion to this in 2s complement would you have a -0 value or only one +0 value?







digital-logic binary





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edited 5 hours ago

























asked 5 hours ago









fred

8317




8317












  • Ignoring the overflow bit is what makes two's complement work. Computers always work in a predefined number of bits.
    – Felthry
    5 hours ago






  • 1




    Adding two 2’s complement numbers with different signs can never cause an overflow.
    – Spehro Pefhany
    2 hours ago


















  • Ignoring the overflow bit is what makes two's complement work. Computers always work in a predefined number of bits.
    – Felthry
    5 hours ago






  • 1




    Adding two 2’s complement numbers with different signs can never cause an overflow.
    – Spehro Pefhany
    2 hours ago
















Ignoring the overflow bit is what makes two's complement work. Computers always work in a predefined number of bits.
– Felthry
5 hours ago




Ignoring the overflow bit is what makes two's complement work. Computers always work in a predefined number of bits.
– Felthry
5 hours ago




1




1




Adding two 2’s complement numbers with different signs can never cause an overflow.
– Spehro Pefhany
2 hours ago




Adding two 2’s complement numbers with different signs can never cause an overflow.
– Spehro Pefhany
2 hours ago










2 Answers
2






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up vote
3
down vote













Carry and overflow are not the same thing.



The MSB of a 2's-complement number is the sign bit. The bit you're talking about is the carry-out from the addition of the MSBs. There is an "overflow" only if the sign bit of the result and that carry out are not identical.



Try a few examples for yourself to see how it works.






share|improve this answer





















  • I will do so noted and thanks. on a side note, I have read that you can get a -0 using 2's complement? how would this happen?
    – fred
    5 hours ago






  • 1




    Not really, but it's a question of how you interpret the pattern "1000 0000". You could think of this as "-0", but it's also what you get when a result equals -128. The problem is that you can't represent +128 as an 8-bit 2's complement number, so the system is slightly asymmetric in that sense. But in sign-magnitude notation, you definitely can have +0 and -0.
    – Dave Tweed
    5 hours ago






  • 2




    -0 only exists in one's complement or floating point systems.
    – pjc50
    5 hours ago










  • Thanks fellas..
    – fred
    5 hours ago


















up vote
1
down vote













There are many ways to explain it. Here is one.



Eight-bit signed binary can represent integers as low as -128DECIMAL and as high as +127DECIMAL. So, why can it not represent the next greater integer, +128DECIMAL?



Answer: it could represent +128DECIMAL. The trouble is, the representation would be the same as that of -128DECIMAL. See:



DECIMAL   BINARY
-128 1000 0000
-127 1000 0001
-126 1000 0010
...
+126 0111 1110
+127 0111 1111
+128 1000 0000
+129 1000 0001
+130 1000 0010
...


Observe:




  • +128DECIMAL is indistinguishable from -128DECIMAL;

  • +129DECIMAL is indistinguishable from -127DECIMAL;

  • +130DECIMAL is indistinguishable from -126DECIMAL;

  • and so on.


By keeping the carry bit (it's actually not an overflow bit; overflow is something else), you would be affirming the false representation, wouldn't you? Try it. You'll see.



You don't want that carry bit.



NOTES ON OVERFLOW



If you wish to know what overflow is, it's what happens when you try (for example) to add 96DECIMAL + 64DECIMAL. The result comes out as -32DECIMAL, which is wrong because the addition register has overflowed.



Note that the example, incidentally, has no carry.






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    2 Answers
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    2 Answers
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    up vote
    3
    down vote













    Carry and overflow are not the same thing.



    The MSB of a 2's-complement number is the sign bit. The bit you're talking about is the carry-out from the addition of the MSBs. There is an "overflow" only if the sign bit of the result and that carry out are not identical.



    Try a few examples for yourself to see how it works.






    share|improve this answer





















    • I will do so noted and thanks. on a side note, I have read that you can get a -0 using 2's complement? how would this happen?
      – fred
      5 hours ago






    • 1




      Not really, but it's a question of how you interpret the pattern "1000 0000". You could think of this as "-0", but it's also what you get when a result equals -128. The problem is that you can't represent +128 as an 8-bit 2's complement number, so the system is slightly asymmetric in that sense. But in sign-magnitude notation, you definitely can have +0 and -0.
      – Dave Tweed
      5 hours ago






    • 2




      -0 only exists in one's complement or floating point systems.
      – pjc50
      5 hours ago










    • Thanks fellas..
      – fred
      5 hours ago















    up vote
    3
    down vote













    Carry and overflow are not the same thing.



    The MSB of a 2's-complement number is the sign bit. The bit you're talking about is the carry-out from the addition of the MSBs. There is an "overflow" only if the sign bit of the result and that carry out are not identical.



    Try a few examples for yourself to see how it works.






    share|improve this answer





















    • I will do so noted and thanks. on a side note, I have read that you can get a -0 using 2's complement? how would this happen?
      – fred
      5 hours ago






    • 1




      Not really, but it's a question of how you interpret the pattern "1000 0000". You could think of this as "-0", but it's also what you get when a result equals -128. The problem is that you can't represent +128 as an 8-bit 2's complement number, so the system is slightly asymmetric in that sense. But in sign-magnitude notation, you definitely can have +0 and -0.
      – Dave Tweed
      5 hours ago






    • 2




      -0 only exists in one's complement or floating point systems.
      – pjc50
      5 hours ago










    • Thanks fellas..
      – fred
      5 hours ago













    up vote
    3
    down vote










    up vote
    3
    down vote









    Carry and overflow are not the same thing.



    The MSB of a 2's-complement number is the sign bit. The bit you're talking about is the carry-out from the addition of the MSBs. There is an "overflow" only if the sign bit of the result and that carry out are not identical.



    Try a few examples for yourself to see how it works.






    share|improve this answer












    Carry and overflow are not the same thing.



    The MSB of a 2's-complement number is the sign bit. The bit you're talking about is the carry-out from the addition of the MSBs. There is an "overflow" only if the sign bit of the result and that carry out are not identical.



    Try a few examples for yourself to see how it works.







    share|improve this answer












    share|improve this answer



    share|improve this answer










    answered 5 hours ago









    Dave Tweed

    115k9143253




    115k9143253












    • I will do so noted and thanks. on a side note, I have read that you can get a -0 using 2's complement? how would this happen?
      – fred
      5 hours ago






    • 1




      Not really, but it's a question of how you interpret the pattern "1000 0000". You could think of this as "-0", but it's also what you get when a result equals -128. The problem is that you can't represent +128 as an 8-bit 2's complement number, so the system is slightly asymmetric in that sense. But in sign-magnitude notation, you definitely can have +0 and -0.
      – Dave Tweed
      5 hours ago






    • 2




      -0 only exists in one's complement or floating point systems.
      – pjc50
      5 hours ago










    • Thanks fellas..
      – fred
      5 hours ago


















    • I will do so noted and thanks. on a side note, I have read that you can get a -0 using 2's complement? how would this happen?
      – fred
      5 hours ago






    • 1




      Not really, but it's a question of how you interpret the pattern "1000 0000". You could think of this as "-0", but it's also what you get when a result equals -128. The problem is that you can't represent +128 as an 8-bit 2's complement number, so the system is slightly asymmetric in that sense. But in sign-magnitude notation, you definitely can have +0 and -0.
      – Dave Tweed
      5 hours ago






    • 2




      -0 only exists in one's complement or floating point systems.
      – pjc50
      5 hours ago










    • Thanks fellas..
      – fred
      5 hours ago
















    I will do so noted and thanks. on a side note, I have read that you can get a -0 using 2's complement? how would this happen?
    – fred
    5 hours ago




    I will do so noted and thanks. on a side note, I have read that you can get a -0 using 2's complement? how would this happen?
    – fred
    5 hours ago




    1




    1




    Not really, but it's a question of how you interpret the pattern "1000 0000". You could think of this as "-0", but it's also what you get when a result equals -128. The problem is that you can't represent +128 as an 8-bit 2's complement number, so the system is slightly asymmetric in that sense. But in sign-magnitude notation, you definitely can have +0 and -0.
    – Dave Tweed
    5 hours ago




    Not really, but it's a question of how you interpret the pattern "1000 0000". You could think of this as "-0", but it's also what you get when a result equals -128. The problem is that you can't represent +128 as an 8-bit 2's complement number, so the system is slightly asymmetric in that sense. But in sign-magnitude notation, you definitely can have +0 and -0.
    – Dave Tweed
    5 hours ago




    2




    2




    -0 only exists in one's complement or floating point systems.
    – pjc50
    5 hours ago




    -0 only exists in one's complement or floating point systems.
    – pjc50
    5 hours ago












    Thanks fellas..
    – fred
    5 hours ago




    Thanks fellas..
    – fred
    5 hours ago












    up vote
    1
    down vote













    There are many ways to explain it. Here is one.



    Eight-bit signed binary can represent integers as low as -128DECIMAL and as high as +127DECIMAL. So, why can it not represent the next greater integer, +128DECIMAL?



    Answer: it could represent +128DECIMAL. The trouble is, the representation would be the same as that of -128DECIMAL. See:



    DECIMAL   BINARY
    -128 1000 0000
    -127 1000 0001
    -126 1000 0010
    ...
    +126 0111 1110
    +127 0111 1111
    +128 1000 0000
    +129 1000 0001
    +130 1000 0010
    ...


    Observe:




    • +128DECIMAL is indistinguishable from -128DECIMAL;

    • +129DECIMAL is indistinguishable from -127DECIMAL;

    • +130DECIMAL is indistinguishable from -126DECIMAL;

    • and so on.


    By keeping the carry bit (it's actually not an overflow bit; overflow is something else), you would be affirming the false representation, wouldn't you? Try it. You'll see.



    You don't want that carry bit.



    NOTES ON OVERFLOW



    If you wish to know what overflow is, it's what happens when you try (for example) to add 96DECIMAL + 64DECIMAL. The result comes out as -32DECIMAL, which is wrong because the addition register has overflowed.



    Note that the example, incidentally, has no carry.






    share|improve this answer



























      up vote
      1
      down vote













      There are many ways to explain it. Here is one.



      Eight-bit signed binary can represent integers as low as -128DECIMAL and as high as +127DECIMAL. So, why can it not represent the next greater integer, +128DECIMAL?



      Answer: it could represent +128DECIMAL. The trouble is, the representation would be the same as that of -128DECIMAL. See:



      DECIMAL   BINARY
      -128 1000 0000
      -127 1000 0001
      -126 1000 0010
      ...
      +126 0111 1110
      +127 0111 1111
      +128 1000 0000
      +129 1000 0001
      +130 1000 0010
      ...


      Observe:




      • +128DECIMAL is indistinguishable from -128DECIMAL;

      • +129DECIMAL is indistinguishable from -127DECIMAL;

      • +130DECIMAL is indistinguishable from -126DECIMAL;

      • and so on.


      By keeping the carry bit (it's actually not an overflow bit; overflow is something else), you would be affirming the false representation, wouldn't you? Try it. You'll see.



      You don't want that carry bit.



      NOTES ON OVERFLOW



      If you wish to know what overflow is, it's what happens when you try (for example) to add 96DECIMAL + 64DECIMAL. The result comes out as -32DECIMAL, which is wrong because the addition register has overflowed.



      Note that the example, incidentally, has no carry.






      share|improve this answer

























        up vote
        1
        down vote










        up vote
        1
        down vote









        There are many ways to explain it. Here is one.



        Eight-bit signed binary can represent integers as low as -128DECIMAL and as high as +127DECIMAL. So, why can it not represent the next greater integer, +128DECIMAL?



        Answer: it could represent +128DECIMAL. The trouble is, the representation would be the same as that of -128DECIMAL. See:



        DECIMAL   BINARY
        -128 1000 0000
        -127 1000 0001
        -126 1000 0010
        ...
        +126 0111 1110
        +127 0111 1111
        +128 1000 0000
        +129 1000 0001
        +130 1000 0010
        ...


        Observe:




        • +128DECIMAL is indistinguishable from -128DECIMAL;

        • +129DECIMAL is indistinguishable from -127DECIMAL;

        • +130DECIMAL is indistinguishable from -126DECIMAL;

        • and so on.


        By keeping the carry bit (it's actually not an overflow bit; overflow is something else), you would be affirming the false representation, wouldn't you? Try it. You'll see.



        You don't want that carry bit.



        NOTES ON OVERFLOW



        If you wish to know what overflow is, it's what happens when you try (for example) to add 96DECIMAL + 64DECIMAL. The result comes out as -32DECIMAL, which is wrong because the addition register has overflowed.



        Note that the example, incidentally, has no carry.






        share|improve this answer














        There are many ways to explain it. Here is one.



        Eight-bit signed binary can represent integers as low as -128DECIMAL and as high as +127DECIMAL. So, why can it not represent the next greater integer, +128DECIMAL?



        Answer: it could represent +128DECIMAL. The trouble is, the representation would be the same as that of -128DECIMAL. See:



        DECIMAL   BINARY
        -128 1000 0000
        -127 1000 0001
        -126 1000 0010
        ...
        +126 0111 1110
        +127 0111 1111
        +128 1000 0000
        +129 1000 0001
        +130 1000 0010
        ...


        Observe:




        • +128DECIMAL is indistinguishable from -128DECIMAL;

        • +129DECIMAL is indistinguishable from -127DECIMAL;

        • +130DECIMAL is indistinguishable from -126DECIMAL;

        • and so on.


        By keeping the carry bit (it's actually not an overflow bit; overflow is something else), you would be affirming the false representation, wouldn't you? Try it. You'll see.



        You don't want that carry bit.



        NOTES ON OVERFLOW



        If you wish to know what overflow is, it's what happens when you try (for example) to add 96DECIMAL + 64DECIMAL. The result comes out as -32DECIMAL, which is wrong because the addition register has overflowed.



        Note that the example, incidentally, has no carry.







        share|improve this answer














        share|improve this answer



        share|improve this answer








        edited 5 hours ago

























        answered 5 hours ago









        thb

        312312




        312312






























             

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